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Daniel's Summary: The details and experience of 30 PCB layouts are wonderful.

2023-04-10Archive

01. The filter capacitor should be as close as possible to IC power supply as well as oscillator, and resistor should be placed in front of oscillator.

02. Resize PCB in Design Board Shape.

03. P+L can be used to place components, vias, pads, copper fills, and text.

04. After drawing is complete, you must specify that prohibited wiring layer is KeepOut-Layer, P+L wiring.

05. Before pouring copper (polygon pour), change rules for calculating safety distance (clearance of 16 mils or so). Note that hatching is typically used and NET network is connected to ground. GND.Select to flood all same network projects, but also remove dead copper (remove dead copper).

Addendum: Pay attention to power layer and ground layer when multilayer copper pouring, because. tracks in FPGA are only 6mil, so when pouring copper, set rule->gap to 6mil and only then pour copper. pouring copper onto other layers It's best to increase ruler->gap by about 16mil, and then change rules back. At this time Track 8mil and Grid 24mil.

06. Note Track 12mil and Grid 24mil when pouring copper into top and bottom layers.

07. The ground wire and power wire are typically 60-80 mils thick, normal minimum line width is 10 mils, and FPGA is typically 6 mils thick.

08.Use S+L to work with cable, use P+M to connect, "<" ">" to adjust spacing, and use P+L to connect, especially when specifying a specific layer For example, this can only be used when wiring layer is disabled.

09. The plus and minus keys + and - are used to switch between layers, page up and page down.

10. R+M distance measurement, units mil and mm switch with Q key.

11. When placing a device: X is symmetrical left and right, Y is symmetrical up and down, SPACE is rotated 90 degrees, and device is viewed using Tab key.

12. When drawing a package diagram, J+L finds a specific point to jump to a location.

13. Fixed base hatching packaged in Origin Maker on Preference PCB display.

14. When drawing a board package, you can queue P+S.

15. When importing a board update, you need to UPDATE in schematic, and when importing a schematic update, you need to update board. Currently, if you don't change Pin order on circuit diagram, you can use it in project->option- Uncheck change sch pins option in >option towhich is often used in interactive wiring, but you need to pay attention:

Sometimes you only need to update one device, you need to find network logo and device you need to update, don't update them all.

16. During processing, solder mask (green surface), silkscreen (display device identification) are usually added, and board thickness is usually 1.5-2mm.

17. The PCB package drawing must be in TOP layers (yellow).

18. Typically, an inductance (about 10mH) should be added between analog power supply and common power supply to eliminate signal influence, and two 0.1uF capacitors should be added for filtering.

19. The AREF analog reference input terminal of single-chip microcomputer should be connected to electrolytic capacitor filter and should be connected to analog ground, and a resistor should be added between analog ground (AGND) and common ground (GND) ), and a positive capacitor A (0.1 µF) should be added between negative analog reference input terminals for filtering.

20. Use Tools -- Annotate Schemas for Automatic Labeling.

21. When drawing a circuit diagram of a device, make good use of device layout rules to draw circuit, such as input pins on left, output pins on right, power supply on top. , and ground at bottom.

22. When drawing a schematic library, you can use parts to design a chip with a large number of pins.

23. A low level may result in a horizontal line appearing on designation sheet.

24. First select some pads, press S to add component connection, add some traces, select device and add ~ key.

25. When laying out a PCB, you must first set rules (very important), and you must set Via, Clearance, etc. in rule.

26.Shift+S to see all wiring at one level, Ctrl+right mouse button+drag=zoom in or out, layered wiring is very useful.

27. If there are many duplicate components, use alignment combination Align to select components to arrange, Shift+Ctrl+H, horizontally evenly, Shift+Ctrl+V , vertically Evenly, shift+ctrl+T, shift+ctrl+B.

28. Place component on bottom layer: select component and press L.

29. When drawing a PCB, if a device or via is green, use a design rule->to set rules, and you can use rules to first checkwhere is problem. is.

30. Group operation: select all devices you want to control and use Shift + left mouse button to double click one of devices to set properties.

31. You need to convert circuit diagram or PCB to pdf format: File->Smart PDF->choose path and settings to get schematic in pdf format.

32. The network symbols are same on all schematic diagrams in a project. If you want to use a general chart and a subchart, select Design->Generate Sheet Symbol from Sheet or HDL. .

Addition:

1. To add a signal layer, use Design->Layer Stack Manager to select top layer and then add;

2. Fanout function: FPGA multi-pin connector can include Auto Route->Fanout-> component, and then select device you want to fanout and check it according to situation;

3. After changing pin order on PCB, decompile it to a schematic. Use Project->Project Option->options to remove Change Schematic Pins option and then Design->Update Schematics in xx.ProPCB.

4. Interactive connection: you need to pay attention to changing order of contacts:

  • First, set up contacts that can be swapped. Tools->Replace contacts/parts->customize. configuration pins cannot be selected. For example, nCSO, nCE, ASDO, DATA0, etc., they cannot be replaced, show only I/O pins, and then select them and add them to a group, such as a group of types;

  • The Pin Swap checkbox is checked so that pins can be swapped;

  • Tools->Lead/Part Replacement->Interactive Lead/Net Replacement (TWI Hotkey).

  • 5, fabric layered board. Note:

  • The internal line width of FPGA is 6 mils (this depends on minimum pin spacing of FPGA!), outer diameter of through hole is 20 mils, inner diameter is 8 mils, and outer circumference of power supply through hole is 50, and inner circle - 20;

  • Isometric lines: If you have strict clock synchronization requirements, you need to place lines of same length. grouped for easy observation of line length (double click All Net to add a group of nets), Tools->Interactive Lenth Tuning (TR shortcut), after selecting a line in net, Tab can be set to increase net, and then find longest line in network for wiring of equal length. Through this wiring before connecting lines first and give enough space c. Differential lines: For DVI interfaces, you need to run differential lines. View->Workspace Panels->Board->Board, and then select Editor differential pairs to create a new differentialth line you want to mark. Mark on diagram first, then use Tools->Interactive Adjustment of Difference Pair Length (TI hotkey) , select line and press Tab to draw longest line you want to lay;

  • Press S+N to select entire network, which is convenient for deleting;

  • To repair a device, double-click it to select locked device.

  • Addition:

    1. It should be said that final check of board is very important, especially unwired check, as well as checking power supply and ground before soldering board, so as not to make a big mistake;

    2. Press L on board to directly edit show and hide of each layer;

    3. Try to cross and stagger wiring to reduce signal interference.